One of the most well-known computers in computer history is the PDP-11 (Programmed Data Processor-11), which was produced by Digital Equipment Corporation (DEC) from the early 1960s to the mid-1990s. The company only ever produced the PDP-11 16-bit computer, which went for $10,800 in 1970.
A hardware stack, multiple addressing modes, processor error traps, and a separate communications path for memory and peripherals (called the UNIBUS) that could move data independently of the processor were just a few of the additional features that set the PDP-11 apart from most of its contemporaries. After the original Multics system was discontinued, the UNIX operating system was used by many early developers and users on the PDP-11.
The advanced computer, the PDP-5, regarded as the first commercial minicomputer, was released by DEC in 1963. This 12-bit architecture, which was created to be utilised in a lab setting, was modified from the 1962 LINC computer. In order to target the PDP-5 at lower settings that didn’t require the power of the bigger 18-bit PDP-4, DEC modified the LINC system and instruction set somewhat. About 1,000 PDP-5 computers were ultimately sold, making it a success. This resulted in the PDP-8, a 12-bit variant with considerably greater cost savings that sold roughly 50,000 units and was significantly more successful.
The brains of the instruction set architecture, or ISA, were eight 16-bit registers. One register served as the stack pointer, and there were six general-purpose registers total. One of the eight addressing modes allowed the registers to access any other register, memory, or direct data. Each register may operate on a 16-bit word, an 8-bit byte, or memory using logic, math, or test operations. An 8-bit byte or 16-bit word of memory might also be read or written in a register. Registers were introduced to later PDP-11 models so they could handle floating-point numbers directly.
Hardware interrupts are supported by the PDP-11 at four priority levels. Software service routines handle interrupts and can define whether they themselves are interruptible (achieving interrupt nesting). The device itself indicates the event that triggers the interrupt by providing the processor with the address of its own interrupt vector.
Blocks of two 16-bit words known as interrupt vectors are located between 0 and 776 in the low kernel address space, which formerly corresponded to low physical memory. The address of the interrupt service routine is contained in the first word of the interrupt vector, and the value that will be put into the PSW (priority level) upon entry into the service routine is contained in the second word.
The instruction set of the PDP-11 processor architecture is primarily orthogonal. For instance, the PDP-11 contains a move instruction that allows either of its operands (source and destination) to be memory or a register in place of commands like load and store. The PDP-11 employs memory-mapped I/O, therefore the same move instruction is used for both input and output. Because of orthogonality, data may even be moved straight from an input device to an output device. The source or destination of more complicated instructions, like add, can either be a memory location, register, an input, or an output.